1. Field of the Invention
The invention relates generally to power amplifier design and more specifically to radio frequency (RF) power amplifier design.
2. Description of the Related Art
Known power amplifiers, particularly those used with wireless communication devices, face a variety of challenges. For such a power amplifier, the concerns include ensuring sufficient gain, providing efficiency with respect to converting direct current (DC) power to radio frequency (RF) output power, establishing breakdown voltage conditions that are sufficiently high to enable long term use of the device, and achieving reliable on/off performance of switching circuitry in switching-class power amplifiers. Currently, there is a desire to use low cost, standard digital complementary metal oxide semiconductor (CMOS) circuitry for radio functions. This desire magnifies potential problems, because among other things, CMOS circuitry typically has very low breakdown voltages.
There are two modes of breakdown voltages that should be considered. The first type of breakdown is junction breakdown. Excess electrons or holes are generated by high electric fields, creating an unwanted flow of current across the device. Eventually, a point is reached where the current actually increases, even as the voltage begins to drop (due to discharge of the anode). This “negative resistance” action allows an increasing current to flow, until excessive heat is generated. Eventually, permanent damage will occur. The second type of breakdown is across an oxide. In MOS processes, the gate of a transistor is insulated by an oxide layer from its drain, source and bulk nodes. Whenever a forward voltage is placed on the gate, there is a potential for breakdown across the oxide, in which the gate can short to the source, drain or bulk regions of the MOSFET. Even if no breakdown occurs across the gate, a long-term threshold voltage shift can occur, which causes the characteristics of the MOSFET to shift, if the gate source voltage is kept too high for a long period of time.
In another challenge, known power amplifiers are usually designed with single-ended power amplifiers driving simple, off-chip, high-Q (low-loss) matching circuits. Such topologies have no isolation between the load and the power amplifier output. Under poor load match conditions, excessive energy can be reflected back to the output stage of the power amplifier. This condition will cause a shift in the output match, resulting in lower RF output power and greatly reduced efficiency. More problematic is the fact that such miss-match conditions generally result in much higher signal swings across the devices, leading to voltage breakdown. Breakdown conditions generally result in permanent damage to the power amplifier. Other power amplifier designs use in-phase input/output power combining, requiring large passive elements on-chip. Another approach uses out-of-phase (push-pull, or complementary) power splitting/combining. Reflections from the load cause similar problems for these topologies, as mentioned above.
In yet another challenge to known amplifiers, when a transistor breaks down, excessive current flows and localized, permanent damage occurs. After the breakdown event, most devices are no longer usable. In some cases, such breakdown is not catastrophic, but does degrade device performance. One known method to prevent voltage breakdown is by operating the transistor well below its breakdown limit. Unfortunately, this approach leads to reduced power output and lower efficiency. In IC processes such as low-voltage CMOS, there is little headroom to begin with, so the back-off approach carries a heavy penalty. In general, high-breakdown devices tend to be built in specialized semiconductor processes, usually at higher costs than other IC processes.
Another approach is to use clamps to prevent voltage from ever reaching damage levels. Clamps limit the voltage by shunting current from the output devices, thus limiting voltage swing to save levels. However, this shunted current is essentially wasted, resulting in lower efficiency. There is a need to prevent breakdown voltage to inexpensive, low voltage IC processes, without affecting efficiency.
In a still further challenge, the requirements for high density, high speed CMOS logic are generally at odds with the requirements for RF power amplifiers. In most cases, the logic sections of the chip operate best with deep, sub-micron MOS devices. Such devices use very thin gate oxides to get low threshold voltages, high gain and fast operation. Such thin oxide devices have very low breakdown voltages, forcing modern CMOS ICs to operate below 1.8, 1.3 or even below 1.0V. CMOS circuit designers have become adept in designing low power analog and RF circuits with very low power supply voltages. However, operation at high signal swings, such as those needed for power amplifiers, is very difficult. For this reason, prior art designs tend to put the power amplifier in a separate chip, which is designed in a semiconductor process with much more breakdown voltage. In general, such higher voltage semiconductor processes are more expensive than standard “vanilla” CMOS. Additionally, the need to go off-chip with the RF signal results in lower efficiency.
In yet another challenge, known devices fail to provide both high gain and high efficiency. For example, known amplifiers from one manufacturer provide a design that provides an efficient design. The known amplifier uses thick lines for the primary and thinner lines for the secondary. In this known amplifier, transformers are used extensively. The amplifier design is based on a low frequency regime, using “lumped-elements” and “flux-coupled” transformers. The efficiency is about 40% (final stage) and 8 db gain. The gain, however, should preferably be about 30 db or higher to have high power-added efficiency (PAE). This low gain hinders this type of amplifier. Other known amplifier designs may have better gain, but are power limited. In one example, the device is limited to 1.2 watts when 4 watts are desired.
While the above-described configurations of power amplifiers allow for some known RF systems to operate, further advances in power amplifier design and methods of use are available. Specific limitations of the prior art include insufficient output power, low system (PAE) efficiency, even lower efficiency at lower output powers, large physical size, use of exotic (or at least, more expensive) semiconductor processes.